# Static Timing Analysis

Project : | CE195352_PSoC_5LP_Blinking_LED01
Build Time : | 09/19/21 14:36:02
Device : | CY8C5888LTI-LP097
Temperature : | -40C - 85/125C
VDDA : | 5.00
VDDABUF : | 5.00
VDDD : | 5.00
VDDIO0 : | 5.00
VDDIO1 : | 5.00
VDDIO2 : | 5.00
VDDIO3 : | 5.00
VUSB : | 5.00
Voltage : | 5.0

Expand All | Collapse All | Show All Paths | Hide All Paths
+ Timing Violation Section
No Timing Violations
+ Clock Summary Section

Clock | Domain | Nominal Frequency | Required Frequency | Maximum Frequency | Violation
--- | --- | --- | --- | --- | ---
ClockBlock/clk_bus_glb_ff | ClockBlock/clk_bus_glb_ff | UNKNOWN | UNKNOWN | N/A |
CyILO | CyILO | 1.000 kHz | 1.000 kHz | N/A |
CyIMO | CyIMO | 3.000 MHz | 3.000 MHz | N/A |
CyMASTER_CLK | CyMASTER_CLK | 24.000 MHz | 24.000 MHz | N/A |
CyBUS_CLK | CyMASTER_CLK | 24.000 MHz | 24.000 MHz | N/A |
Clock_2 | CyMASTER_CLK | 24.000 MHz | 24.000 MHz | 63.504 MHz |
clock_1 | CyMASTER_CLK | 1.000 MHz | 1.000 MHz | 63.922 MHz |
CyPLL_OUT | CyPLL_OUT | 24.000 MHz | 24.000 MHz | N/A |

+ Register to Register Section
+ Setup Subsection
+ Source Clock : Clock_2 : Positive edge(Required Frequency 24 MHz)
+ Destination Clock : Clock_2 : Positive edge(Required Frequency 24 MHz)
Path Delay Requirement : 41.6667ns(24 MHz)

Source | Destination | FMax | Delay (ns) | Slack (ns) | Violation
--- | --- | --- | --- | --- | ---
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 63.504 MHz | 15.747 | 25.920 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.887
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 68.790 MHz | 14.537 | 27.130 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.887
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 72.860 MHz | 13.725 | 27.942 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell6 | U(1,3) | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/clock_0 | \PWM_1:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 3.115
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 79.561 MHz | 12.569 | 29.098 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:status_2\/main_1 | 2.904
macrocell1 | U(1,3) | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/main_1 | \PWM_1:PWMUDB:status_2\/q | 3.350
Route |  | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 2.315
statusicell1 | U(1,3) | 1 | \PWM_1:PWMUDB:genblk8:stsreg\ |  | SETUP | 0.500
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 80.341 MHz | 12.447 | 29.220 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.887
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 80.360 MHz | 12.444 | 29.223 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 2.884
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 88.036 MHz | 11.359 | 30.308 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:status_2\/main_1 | 2.904
macrocell1 | U(1,3) | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/main_1 | \PWM_1:PWMUDB:status_2\/q | 3.350
Route |  | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 2.315
statusicell1 | U(1,3) | 1 | \PWM_1:PWMUDB:genblk8:stsreg\ |  | SETUP | 0.500
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 88.992 MHz | 11.237 | 30.430 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
Route |  | 1 | \PWM_1:PWMUDB:tc_i\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.887
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 89.015 MHz | 11.234 | 30.433 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 2.884
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 95.021 MHz | 10.524 | 31.143 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell6 | U(1,3) | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/clock_0 | \PWM_1:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:status_2\/main_0 | 3.109
macrocell1 | U(1,3) | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/main_0 | \PWM_1:PWMUDB:status_2\/q | 3.350
Route |  | 1 | \PWM_1:PWMUDB:status_2\ | \PWM_1:PWMUDB:status_2\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_2 | 2.315
statusicell1 | U(1,3) | 1 | \PWM_1:PWMUDB:genblk8:stsreg\ |  | SETUP | 0.500
Clock |  |  |  |  | Skew | 0.000

+ Source Clock : clock_1 : Positive edge(Required Frequency 1 MHz)
+ Destination Clock : clock_1 : Positive edge(Required Frequency 1 MHz)
Path Delay Requirement : 1000ns(1 MHz)

Source | Destination | FMax | Delay (ns) | Slack (ns) | Violation
--- | --- | --- | --- | --- | ---
\PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 63.922 MHz | 15.644 | 984.356 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
Route |  | 1 | \PWM:PWMUDB:tc_i\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.784
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 69.281 MHz | 14.434 | 985.566 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/clock | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
Route |  | 1 | \PWM:PWMUDB:tc_i\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.784
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 72.093 MHz | 13.871 | 986.129 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 3.261
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | 5.130
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 81.011 MHz | 12.344 | 987.656 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
Route |  | 1 | \PWM:PWMUDB:tc_i\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.784
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 81.129 MHz | 12.326 | 987.674 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | 0.760
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.z0__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/z0 | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0i | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.740
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 2.766
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 89.815 MHz | 11.134 | 988.866 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/clock | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
Route |  | 1 | \PWM:PWMUDB:tc_i\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 | 2.784
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 89.960 MHz | 11.116 | 988.884 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/clock | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 2.290
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 2.766
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 94.598 MHz | 10.571 | 989.429 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 3.261
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 94.922 MHz | 10.535 | 989.465 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 3.225
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 6.060
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 95.694 MHz | 10.450 | 989.550 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | 6.220
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | SETUP | 4.230
Clock |  |  |  |  | Skew | 0.000

+ Hold Subsection
+ Source Clock : Clock_2 : Positive edge
+ Destination Clock : Clock_2 : Positive edge

Source | Destination | Slack (ns) | Violation
--- | --- | --- | ---
\PWM_1:PWMUDB:status_0\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_0 | 1.574 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell8 | U(1,3) | 1 | \PWM_1:PWMUDB:status_0\ | \PWM_1:PWMUDB:status_0\/clock_0 | \PWM_1:PWMUDB:status_0\/q | 1.250
Route |  | 1 | \PWM_1:PWMUDB:status_0\ | \PWM_1:PWMUDB:status_0\/q | \PWM_1:PWMUDB:genblk8:stsreg\/status_0 | 2.324
statusicell1 | U(1,3) | 1 | \PWM_1:PWMUDB:genblk8:stsreg\ |  | HOLD | -2.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 2.140 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | 2.140
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 | \PWM_1:PWMUDB:runmode_enable\/main_0 | 2.674 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
controlcell2 | U(1,3) | 1 | \PWM_1:PWMUDB:genblk1:ctrlreg\ | \PWM_1:PWMUDB:genblk1:ctrlreg\/clock | \PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 | 0.360
Route |  | 1 | \PWM_1:PWMUDB:control_7\ | \PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 | \PWM_1:PWMUDB:runmode_enable\/main_0 | 2.314
macrocell6 | U(1,3) | 1 | \PWM_1:PWMUDB:runmode_enable\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:prevCompare1\/main_0 | 3.373 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 0.780
Route |  | 1 | \PWM_1:PWMUDB:cmp1_less\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:prevCompare1\/main_0 | 2.593
macrocell7 | U(1,3) | 1 | \PWM_1:PWMUDB:prevCompare1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:status_0\/main_1 | 3.373 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 0.780
Route |  | 1 | \PWM_1:PWMUDB:cmp1_less\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:status_0\/main_1 | 2.593
macrocell8 | U(1,3) | 1 | \PWM_1:PWMUDB:status_0\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | Net_670/main_1 | 3.387 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 0.780
Route |  | 1 | \PWM_1:PWMUDB:cmp1_less\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | Net_670/main_1 | 2.607
macrocell9 | U(1,3) | 1 | Net_670 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:prevCompare1\/q | \PWM_1:PWMUDB:status_0\/main_0 | 3.536 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell7 | U(1,3) | 1 | \PWM_1:PWMUDB:prevCompare1\ | \PWM_1:PWMUDB:prevCompare1\/clock_0 | \PWM_1:PWMUDB:prevCompare1\/q | 1.250
Route |  | 1 | \PWM_1:PWMUDB:prevCompare1\ | \PWM_1:PWMUDB:prevCompare1\/q | \PWM_1:PWMUDB:status_0\/main_0 | 2.286
macrocell8 | U(1,3) | 1 | \PWM_1:PWMUDB:status_0\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | \PWM_1:PWMUDB:prevCompare1\/main_0 | 4.213 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | 0.430
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.cl0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 1.190
Route |  | 1 | \PWM_1:PWMUDB:cmp1_less\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:prevCompare1\/main_0 | 2.593
macrocell7 | U(1,3) | 1 | \PWM_1:PWMUDB:prevCompare1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | \PWM_1:PWMUDB:status_0\/main_1 | 4.213 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell3 | U(0,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | 0.430
Route |  | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u0.cl0__sig\ | \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i | 0.000
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 1.190
Route |  | 1 | \PWM_1:PWMUDB:cmp1_less\ | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb | \PWM_1:PWMUDB:status_0\/main_1 | 2.593
macrocell8 | U(1,3) | 1 | \PWM_1:PWMUDB:status_0\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 4.223 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell6 | U(1,3) | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/clock_0 | \PWM_1:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM_1:PWMUDB:runmode_enable\ | \PWM_1:PWMUDB:runmode_enable\/q | \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 2.973
datapathcell4 | U(1,3) | 1 | \PWM_1:PWMUDB:sP16:pwmdp:u1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000

+ Source Clock : clock_1 : Positive edge
+ Destination Clock : clock_1 : Positive edge

Source | Destination | Slack (ns) | Violation
--- | --- | --- | ---
\PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 2.140 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | 2.140
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/co_msb | \PWM:PWMUDB:sP16:pwmdp:u1\/ci | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:genblk1:ctrlreg\/control_7 | \PWM:PWMUDB:runmode_enable\/main_0 | 2.686 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
controlcell1 | U(2,1) | 1 | \PWM:PWMUDB:genblk1:ctrlreg\ | \PWM:PWMUDB:genblk1:ctrlreg\/clock | \PWM:PWMUDB:genblk1:ctrlreg\/control_7 | 0.360
Route |  | 1 | \PWM:PWMUDB:control_7\ | \PWM:PWMUDB:genblk1:ctrlreg\/control_7 | \PWM:PWMUDB:runmode_enable\/main_0 | 2.326
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u1\/cl0_comb | Net_394/main_1 | 3.093 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/clock | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 0.780
Route |  | 1 | \PWM:PWMUDB:cmp1_less\ | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0_comb | Net_394/main_1 | 2.313
macrocell4 | U(3,1) | 1 | Net_394 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u0\/cl0 | Net_394/main_1 | 3.933 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/cl0 | 0.430
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.cl0__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/cl0 | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0i | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0i | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0_comb | 1.190
Route |  | 1 | \PWM:PWMUDB:cmp1_less\ | \PWM:PWMUDB:sP16:pwmdp:u1\/cl0_comb | Net_394/main_1 | 2.313
macrocell4 | U(3,1) | 1 | Net_394 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u0\/cl1 | Net_354/main_1 | 4.042 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ | \PWM:PWMUDB:sP16:pwmdp:u0\/clock | \PWM:PWMUDB:sP16:pwmdp:u0\/cl1 | 0.540
Route |  | 1 | \PWM:PWMUDB:sP16:pwmdp:u0.cl1__sig\ | \PWM:PWMUDB:sP16:pwmdp:u0\/cl1 | \PWM:PWMUDB:sP16:pwmdp:u1\/cl1i | 0.000
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/cl1i | \PWM:PWMUDB:sP16:pwmdp:u1\/cl1_comb | 1.200
Route |  | 1 | \PWM:PWMUDB:cmp2_less\ | \PWM:PWMUDB:sP16:pwmdp:u1\/cl1_comb | Net_354/main_1 | 2.302
macrocell5 | U(2,1) | 1 | Net_354 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | Net_354/main_0 | 4.466 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | Net_354/main_0 | 3.216
macrocell5 | U(2,1) | 1 | Net_354 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 4.475 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 | 3.225
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | Net_394/main_0 | 4.498 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | Net_394/main_0 | 3.248
macrocell4 | U(3,1) | 1 | Net_394 |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 4.511 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell3 | U(2,1) | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/clock_0 | \PWM:PWMUDB:runmode_enable\/q | 1.250
Route |  | 1 | \PWM:PWMUDB:runmode_enable\ | \PWM:PWMUDB:runmode_enable\/q | \PWM:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 | 3.261
datapathcell1 | U(3,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u0\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000
\PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 4.576 |
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/clock | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | 1.810
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ | \PWM:PWMUDB:sP16:pwmdp:u1\/z0_comb | \PWM:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 | 2.766
datapathcell2 | U(2,1) | 1 | \PWM:PWMUDB:sP16:pwmdp:u1\ |  | HOLD | 0.000
Clock |  |  |  |  | Skew | 0.000

+ Clock To Output Section
+ ClockBlock/clk_bus_glb_ff

Source | Destination | Delay (ns)
--- | --- | ---
\I2C_1:I2C_FF\/scl_out | P00_LCD_SCL(0)_PAD:out | 25.694
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
i2ccell | F(I2C,0) | 1 | \I2C_1:I2C_FF\ | \I2C_1:I2C_FF\/clock | \I2C_1:I2C_FF\/scl_out | 1.000
Route |  | 1 | \I2C_1:Net_643_0\ | \I2C_1:I2C_FF\/scl_out | P00_LCD_SCL(0)/pin_input | 9.443
iocell15 | P0[0] | 1 | P00_LCD_SCL(0) | P00_LCD_SCL(0)/pin_input | P00_LCD_SCL(0)/pad_out | 15.251
Route |  | 1 | P00_LCD_SCL(0)_PAD | P00_LCD_SCL(0)/pad_out | P00_LCD_SCL(0)_PAD:out | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
\I2C_1:I2C_FF\/sda_out | P155_LCD_SDA(0)_PAD:out | 19.628
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
i2ccell | F(I2C,0) | 1 | \I2C_1:I2C_FF\ | \I2C_1:I2C_FF\/clock | \I2C_1:I2C_FF\/sda_out | 1.000
Route |  | 1 | \I2C_1:sda_x_wire\ | \I2C_1:I2C_FF\/sda_out | P155_LCD_SDA(0)/pin_input | 2.703
iocell14 | P15[5] | 1 | P155_LCD_SDA(0) | P155_LCD_SDA(0)/pin_input | P155_LCD_SDA(0)/pad_out | 15.925
Route |  | 1 | P155_LCD_SDA(0)_PAD | P155_LCD_SDA(0)/pad_out | P155_LCD_SDA(0)_PAD:out | 0.000
Clock |  |  |  |  | Clock path delay | 0.000

+ clock_1

Source | Destination | Delay (ns)
--- | --- | ---
Net_354/q | LED_Out_12(0)_PAD | 26.687
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_12(0)/pin_input | 10.099
iocell13 | P3[5] | 1 | LED_Out_12(0) | LED_Out_12(0)/pin_input | LED_Out_12(0)/pad_out | 15.338
Route |  | 1 | LED_Out_12(0)_PAD | LED_Out_12(0)/pad_out | LED_Out_12(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_11(0)_PAD | 26.370
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_11(0)/pin_input | 10.133
iocell12 | P3[4] | 1 | LED_Out_11(0) | LED_Out_11(0)/pin_input | LED_Out_11(0)/pad_out | 14.987
Route |  | 1 | LED_Out_11(0)_PAD | LED_Out_11(0)/pad_out | LED_Out_11(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_3(0)_PAD | 25.798
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_3(0)/pin_input | 9.053
iocell4 | P0[7] | 1 | LED_Out_3(0) | LED_Out_3(0)/pin_input | LED_Out_3(0)/pad_out | 15.495
Route |  | 1 | LED_Out_3(0)_PAD | LED_Out_3(0)/pad_out | LED_Out_3(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_1(0)_PAD | 25.326
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_1(0)/pin_input | 9.053
iocell2 | P0[5] | 1 | LED_Out_1(0) | LED_Out_1(0)/pin_input | LED_Out_1(0)/pad_out | 15.023
Route |  | 1 | LED_Out_1(0)_PAD | LED_Out_1(0)/pad_out | LED_Out_1(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_9(0)_PAD | 25.282
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_9(0)/pin_input | 9.037
iocell10 | P3[2] | 1 | LED_Out_9(0) | LED_Out_9(0)/pin_input | LED_Out_9(0)/pad_out | 14.995
Route |  | 1 | LED_Out_9(0)_PAD | LED_Out_9(0)/pad_out | LED_Out_9(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_354/q | LED_Out_2(0)_PAD | 25.268
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_2(0)/pin_input | 8.457
iocell3 | P0[6] | 1 | LED_Out_2(0) | LED_Out_2(0)/pin_input | LED_Out_2(0)/pad_out | 15.561
Route |  | 1 | LED_Out_2(0)_PAD | LED_Out_2(0)/pad_out | LED_Out_2(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_354/q | LED_Out_8(0)_PAD | 25.016
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_8(0)/pin_input | 7.918
iocell9 | P15[4] | 1 | LED_Out_8(0) | LED_Out_8(0)/pin_input | LED_Out_8(0)/pad_out | 15.848
Route |  | 1 | LED_Out_8(0)_PAD | LED_Out_8(0)/pad_out | LED_Out_8(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_354/q | LED_Out_10(0)_PAD | 24.845
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_10(0)/pin_input | 9.004
iocell11 | P3[3] | 1 | LED_Out_10(0) | LED_Out_10(0)/pin_input | LED_Out_10(0)/pad_out | 14.591
Route |  | 1 | LED_Out_10(0)_PAD | LED_Out_10(0)/pad_out | LED_Out_10(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_354/q | LED_Out_4(0)_PAD | 24.698
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_4(0)/pin_input | 7.978
iocell5 | P1[2] | 1 | LED_Out_4(0) | LED_Out_4(0)/pin_input | LED_Out_4(0)/pad_out | 15.470
Route |  | 1 | LED_Out_4(0)_PAD | LED_Out_4(0)/pad_out | LED_Out_4(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_354/q | LED_Out_6(0)_PAD | 23.099
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell5 | U(2,1) | 1 | Net_354 | Net_354/clock_0 | Net_354/q | 1.250
Route |  | 1 | Net_354 | Net_354/q | LED_Out_6(0)/pin_input | 6.745
iocell7 | P15[2] | 1 | LED_Out_6(0) | LED_Out_6(0)/pin_input | LED_Out_6(0)/pad_out | 15.104
Route |  | 1 | LED_Out_6(0)_PAD | LED_Out_6(0)/pad_out | LED_Out_6(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_7(0)_PAD | 23.074
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_7(0)/pin_input | 6.338
iocell8 | P15[3] | 1 | LED_Out_7(0) | LED_Out_7(0)/pin_input | LED_Out_7(0)/pad_out | 15.486
Route |  | 1 | LED_Out_7(0)_PAD | LED_Out_7(0)/pad_out | LED_Out_7(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000
Net_394/q | LED_Out_5(0)_PAD | 22.017
Type | Location | Fanout | Instance/Net | Source | Dest | Delay (ns)
--- | --- | --- | --- | --- | --- | ---
macrocell4 | U(3,1) | 1 | Net_394 | Net_394/clock_0 | Net_394/q | 1.250
Route |  | 1 | Net_394 | Net_394/q | LED_Out_5(0)/pin_input | 6.338
iocell6 | P15[1] | 1 | LED_Out_5(0) | LED_Out_5(0)/pin_input | LED_Out_5(0)/pad_out | 14.429
Route |  | 1 | LED_Out_5(0)_PAD | LED_Out_5(0)/pad_out | LED_Out_5(0)_PAD | 0.000
Clock |  |  |  |  | Clock path delay | 0.000