| \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
63.504 MHz |
15.747 |
25.920 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
0.760 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.740 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
2.887 |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
5.130 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
|
SETUP |
4.230 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
68.790 MHz |
14.537 |
27.130 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.290 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
2.887 |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
5.130 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
|
SETUP |
4.230 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:runmode_enable\/q |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
72.860 MHz |
13.725 |
27.942 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| macrocell6 |
U(1,3) |
1 |
\PWM_1:PWMUDB:runmode_enable\ |
\PWM_1:PWMUDB:runmode_enable\/clock_0 |
\PWM_1:PWMUDB:runmode_enable\/q |
1.250 |
| Route |
|
1 |
\PWM_1:PWMUDB:runmode_enable\ |
\PWM_1:PWMUDB:runmode_enable\/q |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 |
3.115 |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
5.130 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ci |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
|
SETUP |
4.230 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
79.561 MHz |
12.569 |
29.098 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
0.760 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.740 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:status_2\/main_1 |
2.904 |
| macrocell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/main_1 |
\PWM_1:PWMUDB:status_2\/q |
3.350 |
| Route |
|
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/q |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
2.315 |
| statusicell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:genblk8:stsreg\ |
|
SETUP |
0.500 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
80.341 MHz |
12.447 |
29.220 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
0.760 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.740 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
2.887 |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
|
SETUP |
6.060 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 |
80.360 MHz |
12.444 |
29.223 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
0.760 |
| Route |
|
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
0.000 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.740 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 |
2.884 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
|
SETUP |
6.060 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
88.036 MHz |
11.359 |
30.308 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.290 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:status_2\/main_1 |
2.904 |
| macrocell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/main_1 |
\PWM_1:PWMUDB:status_2\/q |
3.350 |
| Route |
|
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/q |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
2.315 |
| statusicell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:genblk8:stsreg\ |
|
SETUP |
0.500 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
88.992 MHz |
11.237 |
30.430 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.290 |
| Route |
|
1 |
\PWM_1:PWMUDB:tc_i\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 |
2.887 |
| datapathcell3 |
U(0,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u0\ |
|
SETUP |
6.060 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 |
89.015 MHz |
11.234 |
30.433 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/clock |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
2.290 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb |
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 |
2.884 |
| datapathcell4 |
U(1,3) |
1 |
\PWM_1:PWMUDB:sP16:pwmdp:u1\ |
|
SETUP |
6.060 |
| Clock |
|
|
|
|
Skew |
0.000 |
|
| \PWM_1:PWMUDB:runmode_enable\/q |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
95.021 MHz |
10.524 |
31.143 |
|
| Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
| macrocell6 |
U(1,3) |
1 |
\PWM_1:PWMUDB:runmode_enable\ |
\PWM_1:PWMUDB:runmode_enable\/clock_0 |
\PWM_1:PWMUDB:runmode_enable\/q |
1.250 |
| Route |
|
1 |
\PWM_1:PWMUDB:runmode_enable\ |
\PWM_1:PWMUDB:runmode_enable\/q |
\PWM_1:PWMUDB:status_2\/main_0 |
3.109 |
| macrocell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/main_0 |
\PWM_1:PWMUDB:status_2\/q |
3.350 |
| Route |
|
1 |
\PWM_1:PWMUDB:status_2\ |
\PWM_1:PWMUDB:status_2\/q |
\PWM_1:PWMUDB:genblk8:stsreg\/status_2 |
2.315 |
| statusicell1 |
U(1,3) |
1 |
\PWM_1:PWMUDB:genblk8:stsreg\ |
|
SETUP |
0.500 |
| Clock |
|
|
|
|
Skew |
0.000 |
|